Doctoral research project

Person in charge of the project:
LAUWEREINS RUDY, member of research team Associated Section of ESAT - INSYS, Integrated Systems
Architectural Solutions for System-Level Reliability Guarantees
Project summary:
In the last decade of the CMOS technology, reliability has become one of the most challenging issues for a continuous scaling trend. IC systemshave to meet the strict performance constraints during their lifetime, this is often accomplished by overdesign. On the other hand, reliabilitygradually degrades the quality of the chip parameters. Parameter shift was negligible before the Deep-Deep-Sub-Micron era (DDSM), however belowthe 28 nm they have a significant dominance, and causing performance loss and/or severe over design of the system. These criteria mandates of the investigation of the reliability issues and proposing mitigation techniques for the circuits at various levels.Reliability impacts several elements in the circuits: devices, wires, etc. Electromigration (EM) and Time-Dependent Dielectric Breakdown (TDDB) are the most important reliability issues for the wires, whereas Positive/Negative Bias Temperature Instability (NBTI), TDDB, and Hot Carrier Injection (HCI) arefor devices.In this thesis we are planning to explore and model these device level reliability issues, propagate them down to the circuit level and therefore up to the architecture level. On understanding the effects at the architecture level and therefore at the system level, this thesis will explore novel innovative solutions to provide system level reliability guarantees within a limited cost in terms of area, power, etc. Given that these problems occur during the system lifetime, this thesis will propose techniques and/or a solution framework that work over thesystem lifetime, and adapt dynamically to the 'state of the device', and response to the time-dependent degradation of the system parameters.
ph.D student :
Faculty of Engineering Science
Doctoral Programme in Engineering Science (Leuven)